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EOSL_EDA Design Intern (S100/S200)

itri · Hsinchu County, Chutung Town, Taiwan

External listingfull-timeRecently

About The Role

This internship is in ITRI's Electronics and Optoelectronics Systems Research Laboratories (EOSL).

Intern will work on the following topics / tasks

AI-Driven EDA Development and Research

  • Develop fully automated parameter exploration and optimization algorithms and tools based on existing EDA platforms.
  • Design and implement 2.5D/3D chip layout algorithms with considerations for power, performance, and area (PPA).
  • Develop next-generation numerical analysis and computational solvers to accelerate convergence speed.
  • Develop generative programming–based IP and SoC verification technologies to improve verification efficiency and convergence.

Qualifications

Major and student level: Master's or Ph.D. degree.

Required/desired background with specific skills (software, equipment, processes, etc.): Educational or research background relevant to AI-driven EDA, chip layout optimization, numerical analysis, or SoC/IP verification.

Language or other qualifications: Must be able to work on-site at the Hsinchu Zhongxing Campus.

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