Senior Compiler Engineer

Join our Boulder Opal team as a Senior Compiler Engineer, where you will lead the design and evolution of the compiler for next-generation quantum computing systems. You will work closely with researchers and quantum engineers to bridge the gap between quantum algorithms and physical hardware. Your responsibilities will include designing and optimizing compiler infrastructure, maintaining our bespoke Python DSL, building high-performance software, and running experiments on quantum hardware. This is a hands-on role for someone with deep compiler expertise who enjoys solving challenging systems problems and influencing technical direction.

• Design, implement, and optimize compiler infrastructure, intermediate representations, optimization passes, and code generation for quantum computing systems.
• Maintain and evolve a bespoke Python DSL used by researchers to construct pulse-level quantum programs, ensuring it meets the needs of the research community.
• Run experiments on quantum hardware to validate compiler outputs end-to-end, working closely with researchers to translate experimental algorithms into production-quality compiler capabilities.

• This is a hands-on senior engineering role for someone with deep compiler expertise who enjoys solving challenging systems problems and influencing technical direction
• Experience implementing language tooling, parsers or DSLs
• Experience with compiler architectures, intermediate representations, optimisation passes and code generation
• Experience with LLVM, particularly MLIR
• Strong understanding of systems programming and software architecture
• Significant experience designing production compiler systems
• Strong proficiency in Python and C++
• Experience using laboratory instrumentation (AWGs, digitisers, oscilloscopes, SCPI-controlled instruments)
• Experience with quantum control systems or pulse-level programming
• Experience with experimental characterisation of superconducting or semiconductor spin qubits
• Experience with RF signal processing concepts such as IQ modulation
• Experience with FPGA development (Verilog, VHDL or HLS)