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Senior Memory Design Engineer (Project Lead)

Cisco · ZHUBEI, Hsinchu County, Taiwan

Other EngineeringLeadOn-siteImported listingfull-time3 months ago

About The Role

We are expanding our team: As a Senior Memory Design Engineer (Project Lead), you will oversee the design, development, and testing of memory compiler projects, collaborating with cross-functional teams to ensure high-quality, reliable solutions. Ideal candidates bring significant experience in semiconductor memory technologies and circuit design.

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