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异构集成设计工程师-Heterogeneous Integration Design Engineer(J18868)

ChangXin Memory (CXMT) · 安徽省·合肥市

Other EngineeringImported listingfull-time5 months ago

About The Role

  1. 设计规则与测试结构开发：主导Design rule与EDR的设定及对应测试结构设计， 输出技术规范并持续迭代；
  2. 布局规划与客户产品设计：制定框架（Frame）布局规则，完成客户产品T/O，优化版图设计以满足工艺要求；
  3. 芯片物理可靠性设计：设计TEG、Seal ring、TTV/THK pad及切割路径，确保芯片物理可靠性，开发frame/chip dummy填充方案，提升可制造性与良率；
  4. 掩模就绪全流程管理：设计TV spider mask，主导MV产品掩模就绪全流程，执行GDS/JDV校验报告，确保设计数据与工艺匹配性；
  5. 跨部门协同与文档建设：跨部门协同推进技术方案落地，梳理并完善技术规范文档，建立可复用知识库。
  6. 硕士及以上学历，微电子/材料工程专业；
  7. 3年以上相关经验，熟悉 CoWoS集成技术；
  8. 熟悉OVL/bonder mark 设计规范与TEG 结构设计及切割工艺仿真；
  9. 熟练掌握光刻掩模（spider mask）设计流程和GDS 物理验证与 JDV 调试；
  10. 思维开阔，有创新精神

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