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版图设计工程师-Layout Design Engineer(J18330)

ChangXin Memory (CXMT) · 上海市

Other EngineeringImported listingfull-time5 months ago

About The Role

  • 1、根据集成电路原理图完成版图设计;
  • 2、规划版图的floorplan，与电路设计工程师合作，优化版图确保电路性能最优化;
  • 3、完成版图物理验证，包括DRC，LVS，ERC等.
  • 1、熟悉全定制设计流程的版图设计，物理验证，参数提取等;
  • 2、集成电路的相关设计验证的从业经验;
  • 3、熟悉全定制设计的EDA工具，包括Cadence/Synopsys, StarRC, DRC/LVS;
  • 4、有3D layout /模拟/IO等经验均可，精通Wafer on wafer 工艺的layout;
  • 5、具有良好的学习能力，沟通能力和团队合作精神.

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