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模拟IP设计工程师 /专家-Analog IP Design Engineer/Expert(J17435)
ChangXin Memory (CXMT) · 安徽省·合肥市, 上海市, 北京市
About The Role
- 模拟IP电路设计与优化:主导BG、LDO、PLL、ADC等基本模拟IP的电路设计,优化功耗、性能与面积竞争力,结合工艺特点制定完整的测试与验证方案;
- 仿真验证与sign-off:使用模拟设计EDA工具完成前仿与后仿验证,通过脚本加速仿真自动化流程,确保设计满足sign-off标准;
- 测试与量产支持:制定模拟IP的功能测试方案,配合测试工程团队完成芯片测试,分析量产数据并推动设计优化;
- 技术文档与方案沉淀:编写设计规格书、测试计划及表征报告,系统化归档设计经验与IP复用资料;
- 新技术预研与适配:跟踪新工艺与新技术趋势,解析新标准并评估其对模拟IP设计的影响,推动技术迭代。
- 教育背景与专业知识:硕士及以上学历,微电子/集成电路/电子工程等相关专业,具备扎实的模拟电路设计理论功底;
- 专业技能与资格:能使用模拟设计EDA工具完成全流程设计,具备脚本语言(如Python、TCL等)加速仿真自动化的能力;
- 行业与专业经验:5年以上模拟IP设计经验,有BG、LDO、PLL、ADC等至少两类模块的量产流片经验,有先进工艺节点设计经历并解决过实际工艺适配问题;
- 项目/任务成果:主导过至少一款模拟IP从设计到量产的完整流程,完成过功耗、性能与面积的多维优化;
- 其他要求:具有系统化思维和深度数据分析能力,能快速定位并闭环设计缺陷,保持技术好奇心并能主动解析新标准。
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