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版图设计工程师-Layout Design Engineer(J16397)

ChangXin Memory (CXMT) · 上海市, 安徽省·合肥市

Other EngineeringImported listingfull-time5 months ago

About The Role

  1. 版图设计与优化：根据集成电路原理图完成版图设计，规划版图的floorplan，与电路设计工程师协同优化版图以确保电路性能最优化；
  2. 物理验证与签核：完成版图物理验证，包括DRC、LVS、ERC等，确保版图符合设计规则与电气要求；
  3. 参数提取与闭环：完成版图参数提取，确保仿真与实现的一致性，推动版图设计闭环。
  4. 教育背景与专业知识：本科及以上学历，微电子、集成电路或相关专业毕业；
  5. 行业与专业经验：具备集成电路设计验证的从业经验，熟悉全定制设计流程的版图设计、物理验证与参数提取；
  6. 专业技能与资格：能使用Cadence/Synopsys、StarRC、DRC/LVS等EDA工具完成版图设计与验证，有3D layout经验，精通相关工艺的版图设计；
  7. 项目/任务成果：参与过至少两款芯片的全定制版图设计与物理验证，并完成相关签核；
  8. 其他要求：具有良好的学习能力、沟通能力和团队合作精神，能在多团队协作中推进版图设计落地。

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