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FPGA原型验证工程师(J10154)

苏州盛科通信股份有限公司 · 江苏省·苏州市

Imported listingfull-timeabout 20 hours ago

About The Role

  1. 负责芯片FPGA原型验证和Emulation硬件仿真（Palladium/Veloce等）平台的环境搭建；
  2. 负责ASIC RTL代码适配、模块移植、memory和IP替换，完成FPGA和Emulation资源评估、设计分割、顶层集成；
  3. 负责FPGA和Emulation工程集成，完成时序约束、综合实现、镜像生成，上板完成基本功能调试；
  4. 配合前端设计、仿真验证、软件测试团队上板调试，通过抓取波形或其他调试手段进行问题定位；
  5. 维护FPGA和Emulation平台自动化编译脚本，记录问题和解决方案，沉淀技术文档。
  1. 教育背景为电子、计算机、通信、自动化等相关专业，2~5年FPGA原型验证/Emulation硬件仿真经验；
  2. 熟悉Linux工作环境及Perl/Python/Shell/Makefile等编程脚本；
  3. 熟悉Verilog/SystemVerilog，理解可综合设计、时钟复位、跨时钟域、时序等基础原理；
  4. 熟悉Vivado工具链，熟悉综合、实现、时序分析、ILA在线调试；
  5. 了解Emulation硬件仿真平台基本编译、加载、调试流程，有Palladium/Zebu/Veloce任意一种经验优先；
  6. 能够独立排查综合编译报错和基础时序问题，具备板级或EMU平台基础调试能力；
  7. 具有良好的沟通能力和团队合作能力，有较强的抗压能力和综合素质。

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