Packaging Engineer - HV GaN module

The Emerging Packaging Technologies at Texas Instruments is looking for a candidate for HV GaN module development engineer

Responsibilities:

• Design, develop, and characterize high voltage (200–1200V) packages and high-power modules targeting AI infrastructure and Industrial market
• Understand market trends and end equipment system requirements and translate these into package design specifications.
• Define packaging solutions across HV technologies including GaN, SiC, IGBT, and Isolation Technologies; validate designs using CAD, thermomechanical, and electrical parasitic extraction tools.
• Work with material suppliers (mold compounds, die attach, substrates) to qualify materials meeting HV application requirements.
• Collaborate with cross-functional teams across sites to support development and ramp of new products.

Minimum Qualifications:

• MS degree in Mechanical Engineering, Materials Science, Electrical Engineering, or related field.
• 5+ years of hands-on experience in high voltage (200V–1200V) or high-power semiconductor packaging across GaN, SiC, IGBT technologies.
• Hands-on experience with HV package and power module design, materials, and assembly flow integration (molded packages such as TOLT, TOLG, Q-DPAK, DIP, SIP and case modules).
• Familiarity with HV Bill of Materials including mold compounds, die attach, and DBC substrates.
• Experience with stress, thermal, and electrical parasitic modeling tools.
• Understanding of HV discrete and power module reliability and qualification requirements; ability to support qualification activities and contribute to problem solving.
• Good communication skills; able to work effectively with internal teams and external suppliers.
• Proficiency in English and Japanese.
• Prior experience supporting scale-up of HV packages or modules from prototype to volume manufacturing.
• Experience in presenting technical work at internal reviews or industry conferences
• Working knowledge of clip attach, flip chip packaging, and wafer bumping processes.

Preferred Qualifications:

• Prior experience supporting scale-up of HV packages or modules from prototype to volume manufacturing.
• Experience in presenting technical work at internal reviews or industry conferences
• Working knowledge of clip attach, flip chip packaging, and wafer bumping processes.