Principle Engineer - CAD (Physical Verification)

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Job Description:
Develop physical verification regression test cases to QA physical verification decks
Support Layout and Design engineers with physical verification activities using verification tools such as Siemens Calibre,
Cadence Pegasus, or Synopsys Hercules

• Utilize Knowledge of advanced EDA methods to support ESD, ERC, Voltage-Aware DRC, via doubling methodologies, etc.

Work with Technology Development and Device Engineering to develop DRC rules, additional devices, and design for
manufacturability checks

• Develop rule decks as needed to support flow
• Verify and enhance foundry rule decks
• Support remote sites worldwide with layout verification activities
• Support debug of physical verification issues
• Work as a member of team to develop flows to improve quality and reliability of device

Requirements/Qualifications:

• 5+ years developing and supporting PDK activities.
• Fluent with SVRF and TVF.
• Accomplished at debugging PV issues
• Familiar with customizing Calibre Interactive.
• Solid knowledge of layout rules and concepts, device identification concepts, and foundry rules.
• Strong knowledge of Cadence Virtuoso and CalibreDRV.
• Experience using AI solution
• Excellent English verbal and written communication and interpersonal skills.

Travel Time:
0% - 25%
To all recruitment agencies: Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.