Senior Staff ASIC Digital Engineer (SOC Verification Lead, PCIe Experience) with 13 to 19 years of experience

The SoC Development team is seeking highly motivated engineers to join a team of experienced engineers working on the development of advanced controller SoCs.

As a Technologist Verification Engineer in the SoC Development Team, you will be responsible for planning, architecting, and executing verification strategies to validate complex hardware in System-on-Chip (SoC) ASICs. Your work will enable industry-leading data storage control SoCs deployed into high-volume consumer and enterprise products.

The growing diversity of data creates an exponential number of new possibilities – for the world, our company, and you. You’ll be part of a team driving the innovations necessary to outpace new demands and challenges everywhere data lives, from sensors to mobile devices to the cloud. We’ve only started to scratch the surface of what data can do. You can help unlock its full potential.

Essential Duties and Responsibilities

• Ownership: End-to-end ownership of one or more subsystems or SoC verification flows, including planning, execution, and closure
• Mentorship: Experience mentoring junior and mid-level engineers, reviewing their test plans, code, and coverage.
• Define verification strategy, create detailed test plans, and develop robust test benches for SoC verification.
• Collaborate with architects, RTL designers, and pre- and post-silicon verification teams to ensure end-to-end verification coverage.
• Develop and run UVM/SystemVerilog-based verification environments.
• Write, run, and debug C-based tests on SoCs; processor and embedded software knowledge is a must.
• Define and achieve functional and code coverage goals; track and close coverage gaps.
• Run, debug, and sign off gate-level simulations with SDF annotation.
• Develop and validate functional patterns for ATE (Automatic Test Equipment).
• Debug complex issues across multiple domains (digital logic, firmware, timing, DFT).
• Participate in IP and subsystem-level integration verification and ensure smooth transition to SoC-level verification.
• Support low-power verification using UPF and ensure power intent validation.
• Automate regression setup, execution, and result analysis using scripting languages (Python, Perl, TCL, etc.).
• Contribute to verification methodology improvements, reusable environments, and verification infrastructure scalability.
• Work closely with validation and bring-up teams to ensure test portability from pre-silicon to post-silicon.

Required

• BE or MS degree in Electrical Engineering or Computer Engineering, with  13+ years of experience .
• Deep understanding of  C, SystemVerilog UVM, and coverage-driven verification methodology .
• Proven history of  building and improving SV/UVM-based verification methodology .

Skills

• Ability to  develop and execute verification plans  at IP, subsystem, and SoC levels.
• Experience in  test plan creation, test development, and test coverage assessment .
• Proficiency with  C, Verilog, SystemVerilog , and advanced verification methodologies.
• Strong knowledge of  bus protocols  (AXI, AHB, APB) and interconnect fabrics.
• Knowledge of various  interfaces : PCIe, LPDDR, I²C, I3C, SPI, etc.
• Ability to understand  complex datapath flows  of controllers and verify them at SoC level.
• Methodology Development: Proven track record in  building reusable verification environments, libraries, and methodologies  across multiple projects.
• Proficiency in  gate-level simulations , including  SDF annotation and power-aware (UPF/CPF) verification .
• Performance/Stress Testing: Familiarity with  performance verification, traffic generation, and corner-case stress scenarios  at SoC level.
• Regression Infrastructure: Experience in  defining, automating, and scaling regressions  in farm environments.
• Excellent  debugging and problem-solving skills  with simulation and emulation environments.
• Cross-Functional Collaboration: Ability to work closely with  design, validation, firmware, and physical design teams  to resolve system-level issues.
• Proficiency in  programming/scripting languages  such as Python, Perl, TCL, and Bash.
• Strong written and verbal communication skills.
• Demonstrated interest in  ASICs, SoCs, storage controllers, flash memory, and semiconductor components .
• Strong  team player , able to collaborate effectively across architecture, design, and validation teams.

Sandisk thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution.

Sandisk is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at  [email hidden]  to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying.