About The Role

Designs and develops analog circuits in advanced nodes for mixed-signal IPs, including high-speed IO/PHY (DDR/LPDDR, LVDS, GPIO).
Responsible for floorplanning, circuit design, extraction, simulation, and verification to meet power, performance, area, timing, and yield targets.
Creates and executes test plans, analyzes results, and resolves design issues through cross-functional collaboration.
Works across analog, logic, and physical design domains, with a focus on delivering best-in-class, power-efficient and high-performance products.

Qualifications

Bachelor’s or Master’s Degree in Electronic Engineering (or a related field) with over 8 years of FPGA design experience, complemented by strong communication and documentation skills.
The role requires versatility across logic and custom circuit design, including SPICE/RV simulation, signoff reviews, and physical design oversight, along with a solid foundation in VLSI design and advanced process technologies; programming skills in Python, Perl, CSH, TCL, and Makefiles are an added advantage.

Job Type

Regular

Shift

Shift 1 (Malaysia)

Primary Location

Penang 15, Penang, Malaysia

Additional Locations

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.