Sr. Design Verification Engineer

Hybrid, working onsite at our Bangalore offices 3 days per week.

Minimum

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BS in Electrical Engineering, Computer Science, or a related field with 8+ years of industry experience, or an MS in Electrical Engineering, Computer Science, or a related field with 7 years of industry experience is preferred.

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Experience in IP/SoC verification cycle preferably from concept to tape-out to bring-up.

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Good knowledge of verification methodologies such as UVM/OVM, etc.

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Hands-on ASIC-SoC design verification tests and debug experience.

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Fluency with SystemVerilog randomization constraints, coverage, and assertions methodology.

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Good problem-solving skills and the passion to take on challenges (particularly in AI domain).

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Passionate about AI and thriving in a fast-paced and dynamic startup culture.

Preferred

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• Part of Successful implementation of multiple verification environments and tape-out efforts.
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• Experience with C/C++ is good