Principal Electrical Engineer

Division: RMI Engineering Employment Status: Exempt Salary Grade: 111 Shift: Requisition ID: 77302 Please be aware that if you are selected to formally interview for an internal position you will be required to notify your current manager. Please refer to the Employee Transfers Guidelines posted on Skylink. Description About the Role We are seeking a Principal Analog Design Engineer to design, integrate, and characterize high‑performance, high speed analog circuits for next‑generation products. This role requires deep hands‑on expertise, strong system‑level understanding, and the ability to technically lead complex mixed‑signal designs from concept through silicon qualification and production. You will work closely with digital, layout, validation, firmware, and product teams to deliver robust, manufacturable solutions for demanding high speed analog applications Responsibilities Analog Design Architect, design, and simulate A nalog circuit blocks , including: VCOs/PLLs, XOSC High Speed Data converters (ADCs/DACs) Bias generation, bandgap references, LDOs Amplifiers and filters LNAs, mixers Translate system‑level requirements (noise, gain, linearity, power, phase noise) into robust circuit implementations Perform detailed schematic design, simulation, and optimization across PVT corners System & Architecture Contribution Collaborate with system architects to define RF signal chains and analog subsystems Drive tradeoff analysis between performance, power, area, and cost Support RF budgeting (NF, IP3, phase noise, jitter, spur analysis) Silicon Implementation & Signoff Work closely with layout engineers on: Floor planning Sensitive routing and matching EM, IR, and substrate coupling considerations Own or support block‑level and top‑level signoff : AC/DC performance Noise and linearity Stability and yield margin Validation & Debug Lead silicon bring‑up, lab characterization, and debug Correlate measurement results with simulation Identify root causes and drive fixes for silicon issues Support yield improvement and production ramp Technical Leadership Define best practices for RF/analog design and verification Mentor Junior engineers and help refine circuits and architectures Influence roadmap and architectural decisions Serve as a technical point of contact across cross‑functional teams Required Experience and Skills Bachelor’s, Master’s, or PhD in Electrical Engineering or related field Typically 10+ years of hands‑on Analog IC design experience Proven track record of tape‑out ownership and silicon success Strong understanding of: Analog circuit design techniques with CMOS RF fundamentals (noise, linearity, matching, phase noise) Experience with industry tools: Cadence Virtuoso, SpectreRF, EMX or equivalent Comfortable working across process nodes and foundries Desired Experience and Skills Mixed‑signal integration experience (Analog + digital SoC) High‑speed or precision analog experience Familiarity with packaging, test, and manufacturing constraints Experience supporting volume production Soft Skills & Mindset Strong problem‑solving and debugging skills Ability to communicate complex technical concepts clearly Ownership mindset with attention to detail Comfortable influencing without formal authority Collaborative and pragmatic approach to engineering tradeoffs #LI-CB1 Referral Bonus Program Reward (if eligible): Rs200,000.00