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ASIC Engineering Technical Leader | Design Verification | Verilog, System Verilog, UVM, Testbench | Exp- 12+ Years

Cisco · Bangalore, India

External listingfull-time3 months ago

About The Role

Become part of our team as a ASIC Engineering Technical Leader, driving the design verification of complex ASIC chips. Lead and mentor a team, define and enhance testbenches, and ensure high-quality, efficient solutions. Ideal for experienced professionals with deep ASIC design verification expertise and strong leadership skills.

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