Digital Design Engineer

• The candidate will work with team-based VHDL development processes for FPGA-based
• designs is required, including VHDL development, simulation, verification, synthesis, timing
• closure and hardware-based acceleration.

Requirements

•  In-depth knowledge of Xilinx Virtex FPGAs, and Versal MPSoC.
•  Additionally, the candidate must be able to function proficiently in an exclusive UNIX-
• based environment.
•  The candidate should have in-depth knowledge of UNIX-based scripting
•  Xilinx ISE and Vivado experience
•  Modelsim/Questa experience
•  Laboratory test equipment, network test equipment
•  Source code/revision control tools.
•  Implementation experience with JESD204B and JESD204C interfaces and realization of
• high-performance DSP algorithms are a must.
•  Should be able to develop implementation architectures from requirements documents or
• high-level specifications/descriptions; use and maintain legacy IP and build
• environments; troubleshoot designs operating within an integrated system.
•  Experience with DDR3 and DDR4 memory, terrestrial network standards, and design and
• debug of complex circuit boards.
•  VHDL proficiency
•  High speed digital design and lab debug
•  10Gbe experience
•  High speed networking protocol knowledge
•  Candidates with a background in space
•  Proven track record delivering hardware, signal processing.
•  Must have excellent verbal and written communication skills, with the ability to work in
• a high functioning design team

Preferred Skills

• Knowledge of Matlab, Perl, TCL, System C, System Verilog.
• This position is 90-100% onsite. The candidate should be prepared to be onsite just about
• every day with some limited flexibility due to the nature of the hardware that they will be
• working on.
• Interim clearance is sufficient for start.
• Initial phone/zoom interview followed by an in-person interview (CANDIDATE MUST BE
• LOCAL TO INTERVIEW IN PERSON).

Must Have

Degree Level

Bachelor's Degree Yes

Design

• Experience creating and maintaining accurate and detailed design files 10 years
• Experience with complex, high-speed HDL based implementations of algorithms 10 years
• Experience with design/HDL analysis, including high speed and low power design10 years
• Performing basic design calculations 10 years

Electrical/Electronics

• Electrical/Electronics – Digital 10 years
• New Circuit Characterization and Qualification 10 years
• New Circuit Debug 10 years
• Xilinx FPGA 10 years

Hardware

1G - 100G ethernet protocol realization 10 years

Programming

• VHDL / Verilog 10 years
• Xilinx DSP 10 years

Signal Processing

Digital Signal Processing 10 years

Systems

Space Systems 5 years

Nice to Have

Hardware

Real-Time Embedded Systems (RTOS, VxWorks, Xenomai, Linux) 0 years

Programming

• C/C++ Programming 0 years
• Scripting Languages: Perl, Python, Shell Scripting, PowerShell 0 years

Duration: 36 Months

Security Clearance Requirement: No

Security Clearance Level: Interim to Start

Location: Lexington, MA 02421

Pay Range: $70 - $95 an hour

Requirements

Benefits