DDR Lead Verification Engineer

WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.

DDR Lead Verification Engineer

THE ROLE

The focus of this role is to plan, build, and execute the verification of new and existing features for AMD’s Memory Controller IP, resulting in no bugs in the final design.

THE PERSON

You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.

KEY RESPONSIBILITIES

• Collaborate with architects, hardware engineers to understand the new features to be verified
• Build test plan documentation, accounting for interactions with other features
• Estimate the time required to write the new feature tests and any required changes to the test environment
• Build the directed and random verification tests
• Debug test failures to determine the root cause; work with RTL engineers to resolve design defects and correct any test issues
• Review functional and code coverage metrics – modify or add tests or constrain random tests to meet the coverage requirements

PREFERRED EXPERIENCE

• Proficient in IP level ASIC verification
• Proficient in debugging RTL code using simulation tools
• Experience with memory controllers, dfi, dram memory models(ddr4/5, lpddr4/5, hbm, NVDIMM) and/or ddr phys is added advantage
• ASIC design verification experience with 7+Years
• Hands on experience in developing complex UVC
• Good debugging skill and good knowledge of verification tool and methodology
• Hands on experience with coverage planning, coding, and coverage closure
• Should have worked on developing testplan at module level/IP level /Chip-level project
• Mentoring Juniors and ensuring that the team achieves technical goals with high quality.
• Scripting language experience: Perl, Ruby, Makefile, shell preferred.
• Exposure to leadership or mentorship is an asset

ACADEMIC CREDENTIALS

Bachelors or Masters degree in computer engineering/Electrical Engineering

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Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.