Design Verification Engineer

IP Design Verification Engineer (5+ Years Experience)

Are you passionate about Design Verification and excited about building next-generation automotive connectivity solutions?

Our team at Texas Instruments is expanding! We have been driving innovation in low-power BLE solutions, and now we are stepping into the exciting UWB (Ultra-Wideband) domain. If you want to work on cutting-edge IP development that powers real-world automotive applications, this is your opportunity.

Role: IP DV Engineer

Experience: 5+ Years

Education: Bachelor’s / Master’s in Electronics / Electrical Engineering

Required Skillset

• Strong understanding of hardware description languages Verilog/ SystemVerilog / VHDL
• Hands-on experience with UVM and building DV environments from scratch along with coding block functional models (BFM)
• Test plan creation and execution
• Solid understanding of fundamentals of CDC / RDC
• Knowledge of constrained random verification techniques
• Understanding of formal verification methodologies
• Experience in CPF / UPF low-power verification
• Knowledge of AHB / APB bus protocols
• Leading IP verification progress with group of people